Update dependencies
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24
vendor/golang.org/x/sys/cpu/cpu.go
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vendored
24
vendor/golang.org/x/sys/cpu/cpu.go
generated
vendored
@@ -72,6 +72,9 @@ var X86 struct {
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HasSSSE3 bool // Supplemental streaming SIMD extension 3
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HasSSE41 bool // Streaming SIMD extension 4 and 4.1
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HasSSE42 bool // Streaming SIMD extension 4 and 4.2
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HasAVXIFMA bool // Advanced vector extension Integer Fused Multiply Add
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HasAVXVNNI bool // Advanced vector extension Vector Neural Network Instructions
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HasAVXVNNIInt8 bool // Advanced vector extension Vector Neural Network Int8 instructions
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_ CacheLinePad
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}
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@@ -105,6 +108,8 @@ var ARM64 struct {
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HasSVE bool // Scalable Vector Extensions
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HasSVE2 bool // Scalable Vector Extensions 2
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HasASIMDFHM bool // Advanced SIMD multiplication FP16 to FP32
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HasDIT bool // Data Independent Timing support
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HasI8MM bool // Advanced SIMD Int8 matrix multiplication instructions
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_ CacheLinePad
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}
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@@ -199,6 +204,25 @@ var S390X struct {
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_ CacheLinePad
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}
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// RISCV64 contains the supported CPU features and performance characteristics for riscv64
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// platforms. The booleans in RISCV64, with the exception of HasFastMisaligned, indicate
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// the presence of RISC-V extensions.
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//
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// It is safe to assume that all the RV64G extensions are supported and so they are omitted from
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// this structure. As riscv64 Go programs require at least RV64G, the code that populates
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// this structure cannot run successfully if some of the RV64G extensions are missing.
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// The struct is padded to avoid false sharing.
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var RISCV64 struct {
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_ CacheLinePad
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HasFastMisaligned bool // Fast misaligned accesses
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HasC bool // Compressed instruction-set extension
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HasV bool // Vector extension compatible with RVV 1.0
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HasZba bool // Address generation instructions extension
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HasZbb bool // Basic bit-manipulation extension
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HasZbs bool // Single-bit instructions extension
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_ CacheLinePad
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}
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func init() {
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archInit()
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initOptions()
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