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12
vendor/golang.org/x/sys/cpu/cpu_arm64.s
generated
vendored
12
vendor/golang.org/x/sys/cpu/cpu_arm64.s
generated
vendored
@@ -9,31 +9,27 @@
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// func getisar0() uint64
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TEXT ·getisar0(SB),NOSPLIT,$0-8
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// get Instruction Set Attributes 0 into x0
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// mrs x0, ID_AA64ISAR0_EL1 = d5380600
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WORD $0xd5380600
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MRS ID_AA64ISAR0_EL1, R0
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MOVD R0, ret+0(FP)
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RET
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// func getisar1() uint64
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TEXT ·getisar1(SB),NOSPLIT,$0-8
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// get Instruction Set Attributes 1 into x0
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// mrs x0, ID_AA64ISAR1_EL1 = d5380620
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WORD $0xd5380620
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MRS ID_AA64ISAR1_EL1, R0
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MOVD R0, ret+0(FP)
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RET
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// func getpfr0() uint64
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TEXT ·getpfr0(SB),NOSPLIT,$0-8
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// get Processor Feature Register 0 into x0
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// mrs x0, ID_AA64PFR0_EL1 = d5380400
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WORD $0xd5380400
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MRS ID_AA64PFR0_EL1, R0
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MOVD R0, ret+0(FP)
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RET
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// func getzfr0() uint64
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TEXT ·getzfr0(SB),NOSPLIT,$0-8
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// get SVE Feature Register 0 into x0
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// mrs x0, ID_AA64ZFR0_EL1 = d5380480
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WORD $0xd5380480
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MRS ID_AA64ZFR0_EL1, R0
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MOVD R0, ret+0(FP)
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RET
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